CMOS bandgap voltage reference circuit

摘要

In a CMOS bandgap reference circuit (100), the respective collectors of two lateral parasitic NPN transistors (106, 108) are connected to the two nodes of a current mirror (110). The emitter circuit of the first parasitic NPN transistor (106) includes a resistor (116), whereby the base-emitter junction current densities of the parasitic NPN transistors (106, 108) are maintained at a preselected ratio. A second resistor (118) common to the emitter circuit of both parasitic NPN transistors (106, 108) is provided, whereby the difference in base-emitter potentials between the first and second transistors has a positive temperature coefficient and the base-emitter voltage of the second parasitic NPN transistor (108) has a negative temperature coefficient so as to cancel out the above positive coefficient. The temperature independent volatage across the common resistor (118) and the base-emitter junction of the second transistor (108) is buffered by a unity gain amplifier (120). The output of the unity gain amplifier (120) is used to drive the parasitic NPN transistors (106, 108) and also comprises the reference voltage.