Programmable nonvolatile read-only memory having memory cells, each with a memory transistor and a parallel coupled switching transistor and a method for storing a data bit

摘要

PURPOSE:To make the slective writing-in step feasible at relativly low potential without requiring an intermediate potential thereby avoiding the excessive erasing and writing-in by a method wherein the second word line controlling the gate electrode voltage of the selective transistor coupled with the memory transistor connected in series is provided. CONSTITUTION:For example, in case of writing in step, within the same memory array component groups, the control gate electrode of a selective memory transistor QM11 is impressed with a high potential while impressing the control gate electrode of the other memory transistor with a ground potential by the first word line X1 likewise the gate electrode of a selective transistor QS11 coupled with the ground potential while impressing the gate electrode of the other selective transistors QM11 with the high potential by the second word line Z1, on the other hand, a source line S is kept at the ground potential. Resultantly, the selective memory transistor QM11 is fed with a channel current so that the floating gate electrode of the QM11 may be accumulated of electrons by the hot electron implantation using the channel current. Through these procedures, any erroneous and excessive writing-in steps can be avoided without keeping a bit line Y1 at the intermediate potential.