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CMOS feedback sensitive amplifier with high speed feedback

机译:具有高速反馈的CMOS反馈灵敏放大器

摘要

The present invention provides for a sense amplifier (20) having a pair of input nodes (65,66) connected through isolating PMOS transistors (11,12) to the differential input terminals of the amplifier (61,62). Each of the input nodes (65,66) is also connected to the gates of a pair of carefully matched NMOS transistors (21,22) and to the drain of the other of the matched pair (21,22). In addition, each of the input nodes is connected to the gate of one of two drive NMOS transistors (23,24). The drains of the drive NMOS transistors (23,24) are each connected to the gates of two output PMOS transistors (31,32), the drains of which form the output terminals (63,64) of the sense amplifier. The sources of the matched NMOS transistor pair (21,22) are coupled to ground by a NMOS transistor (42) and the sources of the drive NMOS transistors (23,24) are coupled to ground by another NMOS transistor (44). When the differential signals at the input terminals are to be sensed and latched, the sources of matched transistor pair (21,22) and the sources of the drive transistors (23,24) are sequentially connected to ground. Thus even though the input nodes of the amplifier are pulled toward ground in a high-speed operation, the input node at the higher voltage is still able to turn on its corresponding drive NMOS transistor. Latching of the sense amplifier proceeds safely. IMAGE
机译:本发明提供了具有一对输入节点(65,66)的读出放大器(20),该输入节点通过隔离PMOS晶体管(11,12)连接到放大器(61,62)的差分输入端子。每个输入节点(65,66)也连接到一对精心匹配的NMOS晶体管(21,22)的栅极和匹配对中的另一个(21,22)的漏极。另外,每个输入节点连接到两个驱动NMOS晶体管(23,24)之一的栅极。驱动NMOS晶体管(23,24)的漏极分别连接到两个输出PMOS晶体管(31,32)的栅极,两个输出PMOS晶体管(31,32)的漏极形成读出放大器的输出端子(63,64)。匹配的NMOS晶体管对(21,22)的源极通过NMOS晶体管(42)接地,而驱动NMOS晶体管(23,24)的源极通过另一个NMOS晶体管(44)接地。当要感测和锁存输入端子处的差分信号时,匹配的晶体管对(21,22)的源极和驱动晶体管(23,24)的源极顺序接地。因此,即使放大器的输入节点在高速操作中被拉向地,较高电压的输入节点仍能够导通其相应的驱动NMOS晶体管。感测放大器的闩锁安全进行。 <图像>

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