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Method of manufacturing a biopolar transistor in which an emitter region is formed by impurities supplied from double layered polysilicon

机译:制造双极晶体管的方法,其中发射极区由双层多晶硅提供的杂质形成

摘要

A process of fabricating a bipolar transistor, particularly forming a very shallow, uniform emitter diffused-layer for the purpose of realizing a higher speed of the device without need of prolongating LSI fabrication term. In the process of building a bipolar transistor on a n- type semiconductor substrate, after forming the p-type base region of the bipolar transistor, an insulating film is formed, in an region of which where an emitter is to be formed a contact hole is opened. In the next processing step, polysilicon films of different arsenic contents are stacked on top of one the other, followed by thermal diffusion of arsenic, to form an emitter region in the base region. The first polysilicon film has a low arsenic content than the second polysilicon film, and a silicon dioxide film of up to 5 nm in thickness is interposed between the polysilicon films.
机译:制造双极晶体管的过程,特别是形成非常浅,均匀的发射极扩散层的过程,目的是在不延长LSI制造期限的情况下实现更高的器件速度。在n型半导体衬底上构建双极型晶体管的过程中,在形成双极型晶体管的p型基极区之后,形成绝缘膜,在该绝缘膜的要形成发射极的区域中形成接触孔。打开。在下一处理步骤中,将不同砷含量的多晶硅膜彼此堆叠,然后进行砷的热扩散,以在基极区中形成发射极区。第一多晶硅膜具有比第二多晶硅膜低的砷含量,并且在多晶硅膜之间插入厚度高达5nm的二氧化硅膜。

著录项

  • 公开/公告号US5480815A

    专利类型

  • 公开/公告日1996-01-02

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US19930108291

  • 发明设计人 TAKESHI WATANABE;

    申请日1993-08-19

  • 分类号H01L21/328;

  • 国家 US

  • 入库时间 2022-08-22 03:39:16

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