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Method of making single polysilicon self-aligned bipolar transistor having reduced emitter-base junction

机译:具有减小的发射极-基极结的单个多晶硅自对准双极晶体管的制造方法

摘要

A self-aligned single polysilicon bipolar transistor structure and a method of formation thereof are provided. The transistor has an emitter structure characterised by T shape defined by inwardly extending sidewall spacers formed by oxidation of amorphous or polycrystalline silicon, rather than the conventional oxide deposition and anisotropic etch back. Advantageously the method compatible with bipolar CMOS processing and provides a single polysilicon self-aligned bipolar transistor with a reduced number of processing steps. Further the formation of inwardly extending sidewalls defining the emitter width reduces the emitter base junction width significantly from the minimum dimension which is defined by photolithography, while a large area emitter contact is also provided.
机译:提供了一种自对准单多晶硅双极晶体管结构及其形成方法。该晶体管具有由向内延伸的侧壁间隔物限定的T形特征的发射极结构,该侧壁间隔物是由非晶硅或多晶硅的氧化形成的,而不是常规的氧化物沉积和各向异性回蚀。有利地,该方法与双极CMOS处理兼容,并且提供了具有减少的处理步骤数量的单个多晶硅自对准双极晶体管。此外,限定发射极宽度的向内延伸的侧壁的形成大大减小了发射极-基极结的宽度,其比通过光刻法限定的最小尺寸要大,同时还提供了大面积的发射极接触。

著录项

  • 公开/公告号US5516708A

    专利类型

  • 公开/公告日1996-05-14

    原文格式PDF

  • 申请/专利权人 NORTHERN TELECOM LIMITED;

    申请/专利号US19940342041

  • 发明设计人 XIAO-MING LI;T. VICTOR HERAK;

    申请日1994-11-17

  • 分类号H01L21/265;

  • 国家 US

  • 入库时间 2022-08-22 03:38:37

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