首页> 外国专利> METHOD FOR REMOVING OVERCOAT FOR ANALYSIS OF ELECTRIC CHARACTERISTIC OF SEMICONDUCTOR DEVICE HAVING REDUNDANCY FUSE

METHOD FOR REMOVING OVERCOAT FOR ANALYSIS OF ELECTRIC CHARACTERISTIC OF SEMICONDUCTOR DEVICE HAVING REDUNDANCY FUSE

机译:具有冗余保险丝的半导体器件电特性分析的去除保护层的方法

摘要

PURPOSE: To remove an overcoat of a semiconductor device surface layer for an analysis of an electric characteristic without giving a change to a redundancy fuse and losing data of redundancy. ;CONSTITUTION: In a method for removing an overcoat for an analysis of an electric characteristic of a semiconductor device having a redundancy fuse 5, under conditions that a portion of the redundancy fuse 5 of the semiconductor device is coated with a protection film 23 having etching-resistance, and that the redundancy fuse 5 is coated with the protection film 23, an overcoat 19 of a semiconductor device surface layer is removed by etching.;COPYRIGHT: (C)1997,JPO
机译:用途:去除半导体器件表面层的外涂层,以进行电特性分析,而无需更改冗余保险丝并丢失冗余数据。 ;组成:在用于去除分析具有冗余熔丝5的半导体器件的电特性的外涂层的方法中,在半导体器件的冗余熔丝5的一部分上涂覆有具有蚀刻作用的保护膜23的条件下-电阻,并且冗余保险丝5覆盖有保护膜23,通过蚀刻去除半导体器件表面层的保护层19。版权所有:(C)1997,JPO

著录项

  • 公开/公告号JPH0917870A

    专利类型

  • 公开/公告日1997-01-17

    原文格式PDF

  • 申请/专利权人 SONY CORP;

    申请/专利号JP19950183430

  • 发明设计人 OGAWA TAKASHI;

    申请日1995-06-26

  • 分类号H01L21/82;

  • 国家 JP

  • 入库时间 2022-08-22 03:36:09

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