PURPOSE:To attain the high speed of a device by inputting the output of a bipolar MOS type differential amplifying circuit to a MOS-FF circuit and restoring. CONSTITUTION:The data of a memory cell 20a and a dummy cell 12a is read to bit lines BL, BL, and a small potential difference is inputted to the base of the driver bipolar transistors T10, T12 of a circuit 56 through a C-MOS current mirror circuit 52a functioning as the impedance element of the bipolar C-MOS differential amplifier 56. Then, the amplified output of the circuit 56 is transferred to output lines OL1, OL2. It is fed back to an FF circuit 54 a through transfer gates FETQ54, Q56 and restored at high speed. Further, the potential difference in the bit lines goes to about 2V, an FF circuit 50a is operated to raise a voltage substantially to a supply voltage. Thereby, the high speed device can be attained.
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