Test manner of test pattern bit sequence generation circuit and digital circuit device

摘要

Seed skipping means are provided for use in conjunction with a linear feedback shift register used as a pseudo-random pattern generator for generating sequences of test bit streams for testing integrated circuit devices. The utilization of seed skipping means for the pseudo-random pattern number generator in connection with weighting of the patterns from the random pattern generator provides an effective and low cost solution to data storage problems associated with generating effective test patterns for testing integrated circuit chip devices. IMAGE