首页> 外国专利> A complementary differential amplifier having a high degree of freedom in designing a DC amplification gain and a semiconductor memory device using the complementary differential amplifier

A complementary differential amplifier having a high degree of freedom in designing a DC amplification gain and a semiconductor memory device using the complementary differential amplifier

机译:在设计直流放大增益时具有高度自由度的互补差分放大器和使用该互补差分放大器的半导体存储器件

摘要

The present invention relates to a complementary differential amplifier which is used in a semiconductor integrated circuit, particularly a semiconductor memory circuit, and amplifies a minute complementary signal at a high speed with a complementary output of large amplitude. In order to increase the design freedom of the DC amplification gain and reduce the transmission rate delay, A plurality of cascade-connected internal differential amplifying means for sequentially inputting a complementary input as a first complementary input and sequentially amplifying the input complementary input, Each of the internal differential amplification means comprises a pair of first and second internal output nodes, the complementary internal output being generated, the source of which is coupled to the first power supply potential and the gate thereof is crossed to its drain, A pair of first and second MOS transistors of first conductivity type respectively connected to internal output nodes, a pair of MOS transistors of first conductivity type Third and fourth MOS transistors of a first conductivity type diode connection connected between a first power supply and a pair of internal output nodes in parallel with each other and a pair of internal output nodes and a second power supply, And a driving circuit for driving the first to fourth MOS transistors according to the complementary internal output of the previous stage in the next stage in accordance with the complementary input.;With such a configuration, it is possible to increase the degree of freedom in designing the DC amplification factor, and to shorten the delay time of the driving circuit and the logic circuit in the next stage.
机译:互补差分放大器技术领域本发明涉及一种互补差分放大器,其用于半导体集成电路,特别是半导体存储电路,并且以大幅度的互补输出高速放大微小的互补信号。为了增加DC放大增益的设计自由度并减少传输速率延迟,多个级联的内部差分放大装置,用于依次输入互补输入作为第一互补输入,并依次放大输入互补输入。内部差分放大装置包括一对第一和第二内部输出节点,产生互补的内部输出,其源极耦合到第一电源电势,并且其栅极与它的漏极交叉。第一导电类型的第二MOS晶体管分别连接到内部输出节点,第一导电类型的一对MOS晶体管第一导电类型的二极管连接的第三和第四MOS晶体管并联连接在第一电源和一对内部输出节点之间彼此和一对内部输出节点以及第二个电源,以及用于根据互补输入在下一级中根据前一级的互补内部输出驱动第一至第四MOS晶体管的驱动电路。设计直流放大因子的自由度,并缩短了下一级驱动电路和逻辑电路的延迟时间。

著录项

  • 公开/公告号KR960042750A

    专利类型

  • 公开/公告日1996-12-21

    原文格式PDF

  • 申请/专利权人 기따오까 다까시;

    申请/专利号KR19960014383

  • 发明设计人 쯔끼까와 야스히꼬;

    申请日1996-05-03

  • 分类号G11C11/407;

  • 国家 KR

  • 入库时间 2022-08-22 03:18:52

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