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A phase locked loop circuit capable of receiving a supply voltage and a method of adjusting the phase locked loop circuit and a method of adjusting the phase locked loop circuit.
A phase locked loop circuit capable of receiving a supply voltage and a method of adjusting the phase locked loop circuit and a method of adjusting the phase locked loop circuit.
Phase locked loop designs are provided that can operate at a number of different supply voltages. By adjusting the frequency range of the PLL based on the voltage of the power supply, the same PLL design can be operated at different supply voltages.
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