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Analog-to-digital conversion using comparator coupled capacitor digital- to-analog converters

机译:使用比较器耦合电容数模转换器进行模数转换

摘要

An analog-to-digital converter circuit (ADC) is described which comprises capacitor based digital-to-analog converter circuits (CDACs) coupled to the inputs of a voltage comparator wherein a reference voltage of one CDAC section has been scaled with respect to a reference voltage of another CDAC section such that one CDAC section adds additional resolution to the other CDAC section. The invention may be applied to single input ADCs as well as to differential ADCs with either type operating in either unipolar or bipolar mode. Also described are various known approaches to both single input and differential CDAC-based successive approximation ADCs, as well as a novel technique of capacitive input voltage attenuation for differential ADCs.
机译:描述了一种模数转换器电路(ADC),其包括基于电容器的数模转换器电路(CDAC),其耦合到电压比较器的输入,其中一个CDAC部分的参考电压已经相对于一个另一CDAC部分的基准电压,以便一个CDAC部分为另一CDAC部分增加分辨率。本发明可以应用于单输入ADC以及以单极性或双极性模式工作的任何类型的差分ADC。还介绍了针对单输入和基于差分CDAC的逐次逼近ADC的各种已知方法,以及针对差分ADC的电容性输入电压衰减的新技术。

著录项

  • 公开/公告号US5581252A

    专利类型

  • 公开/公告日1996-12-03

    原文格式PDF

  • 申请/专利权人 LINEAR TECHNOLOGY CORPORATION;

    申请/专利号US19940322430

  • 发明设计人 DAVID M. THOMAS;

    申请日1994-10-13

  • 分类号H03M1/46;

  • 国家 US

  • 入库时间 2022-08-22 03:11:03

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