BiCMOS Integrated Circuit and Fabrication Process (BiCMOS Integrated Circuit and Fabrication Process Thereof)

摘要

The first photoresist layer has an opening in a region where an n-channel MOS transistor is to be formed and in an area in which a collector lid region is to be formed. Phosphorus is then implanted using the first photoresist layer as a mask. Then, the first photoresist layer is removed and a second photoresist layer is formed. The second photoresist layer has an opening in the region in which the emitter region is to be formed and in the region in which the collector liding region is to be formed. Phosphorus is implanted using a second photoresist layer as a mask, thereby forming an n-type selective diffusion region in a region below the region where the emitter region is to be formed and in a region where the collector liding region is to be formed. The second photoresist layer is then removed. A polycrystalline silicon layer is formed on the entire surface and arsenic is implanted into it to make n-type. Then, a heat treatment is performed to form an n-type diffusion layer in the region where the emitter region is to be formed and in the region where the emitter region and the collector liding region are to be formed.