Method for forming thin trench device isolation (STI) structure of semiconductor device using physical-chemical polishing (CMP) equipment and physical-chemical polishing equipment

摘要

According to the present invention, when a predetermined material formed on a wafer is polished by a chemical-mechanical polishing (CMP) device, an EMP (Etch Stop Point) of the polishing process can be accurately detected. The present invention relates to a method for forming an STI structure of a semiconductor device using the equipment and the CMP device, wherein the CMP device is driven by predetermined driving means including a polishing pad and a driving motor fixed on a table. A wafer chucked to the conductor of the wafer chuck from a wafer chuck surrounded by its side and a predetermined power supply from the power supply to the conductor of the wafer chuck by an insulator for allowing the conductor portion to be transferred to the wafer only. When transferred to the slurry solution filled between the wafer and the polishing pad, the end point is determined by detecting the power supply. A method for forming an STI structure of a semiconductor device according to the present invention, comprising a current detecting means, comprising the CMP device configured as described above, after forming a thin first insulating layer on a silicon substrate, Sequentially depositing a second insulator; Patterning the second insulating layer by photolithography and etching; Forming a trench by continuously etching the conductive layer, the first insulating layer, and the silicon substrate using the second insulating layer pattern as a hard mask, and then selectively etching the second insulating layer pattern; After depositing the third insulator on the front surface of the resultant, the third insulation layer was polished by the CMP apparatus according to the present invention while applying power to the back side of the wafer through the conductor portion of the wafer chuck of the CMP apparatus and detecting current. Detecting current in the slurry solution filled between the long-term wafer and the polishing pad by means; The timing at which the current detected by the current detecting means suddenly changes is determined as the polishing end point for the third insulator and the polishing is continued for a predetermined time with respect to the end point, so that not only the third insulating layer but also the conductive layer Simultaneously polishing them so as to remain by a predetermined thickness relative to the silicon substrate; After the polishing process is completed, the step of sequentially etching the conductive layer remaining on the silicon substrate and the third insulating layer.