IN-PHASE SIGNAL OUTPUT CIRCUIT, OPPOSITE-PHASE SIGNAL OUTPUT CIRCUIT, AND PHASE SIGNAL OUTPUT CIRCUIT

摘要

In the present invention, in generating and outputting a two-phase signal from a one-phase signal, using the polarity of the input signal of the device by BiCMOS, it is possible to make the delay of the two-phase signal nearly equal in the minimum required signal passing path. It is for.;The present invention for this purpose, the signal / / which is in phase with the signal (/ EN) from the input terminal 3 to make the inverter 1, the signal in phase with the signal (/ EN) from the input terminal 3 In the circuit for making (Ф) into the inverters 8 and 2, when the signal / EN transitions from the high level to the low level, the bipolar transistor 35 is turned on momentarily, forcibly output terminal ( When 5) is set at the low level and the signal / EN is shifted from the low level to the high level, the transistor 10 is turned on before other circuits to forcibly set the output terminal 5 to the high level. Therefore, the delay time from the level shift of the signal / EN to the level shift of the signal / Ф of the output terminal 4 and the delay time from the level shift of the signal? Of the output terminal 5 are determined. By making them nearly equal, the phase relationship between the signal? And the signal?