In an ATM network interface controller, a traffic management system is provided to allow implementation of available bit rate, or ABR, flow control by an external processor and the use of a new ABR controller within the traffic management system which provides functions that enable an external processor to control the flow control behavior of the network interface controller. The ABR controller accesses an external memory to control the flow of cells injected into the network. In one embodiment, the subject system uses a traffic shaper to control cell transmission rates, submits requests to an external memory which are processed by an external processor, and reads data from an external memory to adjust cell transmission rates and/or generates Resource Management, or RM, cells. More particularly, in one embodiment, the traffic shaper uses a timing chain approach enhanced with a delay queue which is capable of delaying transmission of i cell for a long period of time, thus being able to accurately control a wide range of cell transmission rates for multiple cell streams independently. The subject system submits requests to an external memory when it receives an RM cell, sends an RM cell, or when reaching a cell transmission limit, initiates processing by an external processor. An external processor communicates with the subject system by writing data into an external memory. The subject system reads data from the memory and determines what cell to send, how long it should be delayed before sending a next cell, thus allowing an external processor to easily control the behavior of an ATM network interface controller to implement a wide variety of flow control schemes.
展开▼
