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Methodology for in situ etch stop detection and control of plasma etching process and device design to minimize process chamber contamination

机译:原位蚀刻停止检测以及等离子蚀刻工艺和装置设计的控制方法,可最大程度地减少工艺室污染

摘要

A method of etching a dielectric layer to form a via to an underlying conductive layer is described. The method includes etching selected portions of the dielectric using a plasma containing an etchant and monitoring electromagnetic energy of plasma emission radiation from the species to determine a ratio of a pair of the species in the plasma that is used to indicate the onset of an etch stop phenomenon. Etching of the dielectric continues and additional dielectrics are processed through the plasma etching step while the ratio of species is less than a predetermined threshold value. The process is stopped and a plasma reactor is cleaned once the ratio of the etchants exceeds the threshold value. The method can be used to form vias between a pair of conductive layers. In a preferred approach to form areas for area or bond pads of an integrated circuit during the step of etching the dielectric, the dielectric is masked by a pattern which provides a plurality of vias dispersed within the pad area to be etched forming a sea of contacts or disposed about the periphery of the pad area to be etched forming a ring of contacts contact.
机译:描述了一种蚀刻介电层以形成到下面的导电层的通孔的方法。该方法包括使用包含蚀刻剂的等离子体蚀刻电介质的选定部分,并监视来自物种的等离子体发射辐射的电磁能,以确定等离子体中一对物种的比率,该比率用于指示蚀刻停止的开始现象。继续蚀刻电介质,并通过等离子蚀刻步骤处理其他电介质,同时物质的比率小于预定阈值。一旦蚀刻剂的比例超过阈值,就停止该过程并清洗等离子体反应器。该方法可以用于在一对导电层之间形成通孔。在优选的方法中,在蚀刻电介质的步骤期间形成用于集成电路的区域或键合焊盘的区域,电介质被图案掩盖,该图案提供了分散在要蚀刻的焊盘区域内的多个通孔,从而形成触点海。或设置在要蚀刻的焊盘区域的周围,形成接触环。

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