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Method for the prevention of misfit dislocation in silicon wafer and silicon wafer structure manufactured thereby

机译:防止硅晶片失配位错的方法及由此制造的硅晶片结构

摘要

There are disclosed methods for the prevention of misfit dislocation in a silicon wafer and the silicon wafer structure manufactured thereby. A method according to an embodiment comprises the steps of: depositing a blanket silicon oxide or silicon nitride on silicon wafer in a chemical vapor deposition process; selectively etching the silicon oxide or silicon nitride, to form a silicon oxide or silicon nitride pattern which is of close shape; and injecting the silicon wafer with impurities at a high density with the CVD silicon oxide or silicon nitride pattern serving as a mask, so as to form an impurity-blocked region is formed under the CVD silicon oxide or silicon nitride through the action of the mask. The misfit dislocation is propagated mainly from the edge of wafer and an impurity-blocked region can prevent the propagation. The propagation energy is virtually based on the tensile stress attributable to the implantation of impurity. Formation of an impurity-blocked region in the wafer barricades the propagation of misfit dislocation because the propagation energy is not supplied in this region. Thus, the area of the silicon wafer enclosed by the impurity-blocked region has no misfit dislocation. By such conception, a silicon wafer free of misfit dislocation can be manufactured. Therefore, there are improved in electrical and mechanical properties in electrical devices, X- ray masks and micromachines as well as in surface roughness.
机译:公开了用于防止硅晶片中的失配位错的方法以及由此制造的硅晶片结构。根据一个实施例的方法包括以下步骤:在化学气相沉积工艺中在硅晶片上沉积毯式氧化硅或氮化硅;选择性地蚀刻氧化硅或氮化硅,以形成形状接近的氧化硅或氮化硅图案;并以CVD氧化硅或氮化硅图案为掩模,向硅晶片注入高密度的杂​​质,以通过掩模的作用在CVD氧化硅或氮化硅的下方形成杂质阻挡区域。 。失配位错主要从晶片边缘传播,并且杂质阻挡区域可以防止该传播。传播能量实际上基于可归因于杂质注入的拉伸应力。由于在该区域中没有提供传播能量,所以在晶片路障中形成杂质阻挡区域会阻碍失配位错的传播。因此,被杂质阻挡区域包围的硅晶片的区域没有失配位错。通过这种构思,可以制造没有错位错位的硅晶片。因此,改善了电气装置,X射线掩模和微型机器中的电气和机械性能以及表面粗糙度。

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