WALLACE TREE MULTIPLIER USING HALF-ADDER AND FULL-ADDER

摘要

PROBLEM TO BE SOLVED: To decrease the number of partial product stages relating to a multiplying circuit by adding the bits of the input of a column and generating a partial product and a carry bit, and interconnecting a stage of each column adder to other stage of the same column adder and the stage of another column adder. ;SOLUTION: A tree 500 has two bits 501 and 502 sent in a half-adder 400 of a 1st stage 531. Other three bits 503 to 505 are sent in a full-adder 100. The 1st stage 531 reduces five bits to four and a 2nd stage 532 reduces the number of bits to three. The final stage generates sum and carry bits 511 and 512. Therefore, a stage which is one less in the number of logic gates is used to reduce the number of circuits and gate delay from a stage to a stage. Thus, exiting carry bits which are as many as carry bits arriving from a precedent column are generated to a following column to decrease the number of the stages of the multiplier.;COPYRIGHT: (C)1998,JPO