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Method and method for forming an integrated circuit structure having enhanced metal silicide contacts using notched sidewall spacers on gate electrodes
Method and method for forming an integrated circuit structure having enhanced metal silicide contacts using notched sidewall spacers on gate electrodes
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机译:使用栅电极上的缺口侧壁间隔物形成具有增强的金属硅化物触点的集成电路结构的方法和方法
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摘要
A method of forming an improved metal silicide contact on a gate electrode and a source / drain region of an MOS device of an integrated circuit structure formed on a silicon substrate is described. The metal silicide contact is first formed by forming a silicon oxide layer on the exposed portion of the silicon substrate and the exposed surface of the previously formed polysilicon gate electrode. Silicon nitride sidewall spacers are then formed on the oxide on the sidewalls of the gate electrode by anisotropically etching the silicon nitride layer after depositing a layer of silicon nitride over the entire structure. The source / drain regions are formed in the silicon substrate adjacent to the nitride spacers, which are then in contact with the oxide etch to remove oxide from the top surface of the gate electrode and the substrate surface on the source / drain regions. During the oxide etch step, notches having aspect ratios of 1 or less are formed at the exposed edges of the oxide between the silicon nitride spacers and the substrate, or between the gate electrodes. A metal layer, which can then react with the exposed silicon to form a metal suicide contact, is deposited to cover the entire surface and into the notch. After the metal silicide is formed by the reaction of the metal with the silicon surface in contact with the metal, a notch is formed in the oxide layer on the sidewall of the electrode as well as on the top surface of the polysilicon gate electrode to form a metal silicide gate contact The remaining unreacted metal is removed. An extended area of the metal silicide source / drain contact is also formed on the exposed silicon surface of the source / drain region and on a portion of the silicon substrate beneath the exposed nitride spacer due to notches formed in the oxide below the nitride spacer.
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