LATTICE MISMATCHED HIGH ELECTRON MOBILITY TRANSISTOR

摘要

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lattice mismatched high electron mobility transistor, comprising: a buffer layer (2) composed of an InAlAs compound semiconductor and a channel composed of an InGaAs compound semiconductor in a lamination order from a semi-insulated InP substrate (1) having a (100) Layer (3), isolation layer (4) consisting of undoped InAlAs compound semiconductor, second isolation layer (6) consisting of n-type silicon delta-doped layer (5) and undoped InAlAs compound semiconductor, Each epitaxial layer is composed of an n-doped InGaAs compound semiconductor, and each epitaxial layer is composed of an undoped InGaAs lattice matched channel layer of 70% In and a 60% In composition. The InAlAs compound semiconductor layer is composed of 52% of In and 48% of Al and Group V of elements except for the channel layer composed of an undoped lattice mismatched strain layer having a compositional gradient. Is a ratio of 1: 1 And must, InGaAs compound semiconductor layer is 53% of In, As Ⅲ element and which is composed of 47% Ga V group element is 1, respectively: form the composition ratio of one.;Therefore, since the composition ratio of In can be increased without reducing the thickness of the channel layer, electron mobility can be improved.