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Multilevel interconnect structure for high density integrated circuit devices, integrated circuit memories
Multilevel interconnect structure for high density integrated circuit devices, integrated circuit memories
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机译:用于高密度集成电路器件的多层互连结构,集成电路存储器
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摘要
A multilevel interconnect is formed which uses air (74) as a dielectric between wiring lines (66) bounded on an upper surface by a capping layer (70). A sacrificial layer is used to separate the wiring lines and is consumed leaving air gaps. A multilevel interconnect is formed which uses air as a dielectric between wiring lines. A pattern of wiring lines is formed over an insulating layer (62), a first wiring line is laterally separated from a second wiring line by a sacrificial layer. The surface of this layer is recessed below the surfaces of the wiring lines. A capping layer (70) is formed over the recessed surface and the wiring lines. The sacrificial layer is consumed through the capping layer leaving an air dielectric (74) between the two wiring lines bounded on an upper surface by the capping layer.
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