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Method for creating and using design shells for integrated circuit designs

机译:用于集成电路设计的设计外壳的创建和使用方法

摘要

A method for creating a shell to represent a functional block of an IC design comprising of a plurality of interconnected functional blocks. The critical information from a synthesized gate level block is retained in the shell such that when analyzing the static characteristics of another block connected to the block now represented by the shell the analysis is still accurate. At a hierarchial level the present invention provides a method for analyzing the functional blocks of an IC design such that the memory requirement for storing the information of the functional blocks of the IC design is reduced as well as a decrease in run time.
机译:一种用于创建表示IC设计的功能块的外壳的方法,该外壳包括多个互连的功能块。来自合成门级模块的关键信息保留在外壳中,以便在分析连接到现在由外壳表示的模块的另一个模块的静态特性时,分析仍然是准确的。在层次上,本发明提供了一种用于分析IC设计的功能块的方法,从而减少了用于存储IC设计的功能块的信息的存储器需求以及运行时间的减少。

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