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FPGA INTEGRATED CIRCUIT HAVING EMBEDDED SRAM MEMORY BLOCKS EACH WITH STATICALLY AND DYNAMICALLY CONTROLLABLE READ MODE
FPGA INTEGRATED CIRCUIT HAVING EMBEDDED SRAM MEMORY BLOCKS EACH WITH STATICALLY AND DYNAMICALLY CONTROLLABLE READ MODE
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机译:具有集成的SRAM存储器模块的FPGA集成电路,每个模块具有静态和动态可控的读取模式
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摘要
A field-programmable gate array device (FPGA) having plural rows and columns of logic function units (VGB's) further includes a plurality of embedded memory blocks, where each memory block is embedded in a corresponding row of logic function units. Each embedded memory block has an address port for capturing received address signals and a controls port for capturing supplied control signals, including a read-mode (RMODE) control signal that switches the memory block between synchronous and asynchronous data transfer modes. Interconnect resources are provided including a Memory Controls-conveying Interconnect Channel (MCIC) for conveying shared address and control signals to plural ones of the memory blocks on a broadcast or narrowcast basis.
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