TESTING SCHEME THAT RE-USES ORIGINAL STIMULUS FOR TESTING CIRCUITRY EMBEDDED WITHIN A LARGER CIRCUIT

摘要

Test circuit used to test the X portions of circuit elements embedded in large circuits. The test circuit includes Y scan flip flops each having a normal data input, a scan data input, a data select input, a clock input, and a data output. The scan flip flops are coupled in series with each other so that the scan data input of the first flip flop forms a serial data input for the test circuit, the data output of the last flip flop forms a serial data output for the test circuit, and the remaining flip flops Each scan data input is connected to the data output of the previous flip flop, the normal data input of one or more scan flip flops form an unloaded bus, and the data select signal of one or more scan flip flops includes one or more serial data. Form a testable signal that enables the input and unloaded buses. Also included are Y latches, each with a data input, clock input, and data output. Each latch has a data input and a clock input connected to each data output and data select input of a different scan flip flop. The data outputs of one or more latches form a load bus. Each set of X input multiplexers has an input coupled to the load bus and an output coupled to different X portions of circuitry. The output multiplexer has an output and X inputs. The output is coupled to an unloaded bus and each input is coupled to different X portions of the circuitry.