Two-transistor type electrically erasable programmable read only memory has a selection transistor gate electrode with two selection gate electrodes separated by an interlevel insulation layer

摘要

An electrically erasable programmable read only memory (EEPROM), has a selection transistor gate electrode (II) comprising two selection gate electrodes (112b, 116b) separated by an interlevel insulation layer (114b). An EEPROM has (a) a scanning transistor gate electrode (I) which is formed on a gate insulation layer (104) and a thinner tunnel insulation layer (110) on an integrated circuit (IC) substrate (100) and which comprises a floating gate electrode (112a), an interlevel insulation layer (114a) and a scanning gate electrode (116a); (b) a selection transistor gate electrode (II) comprising a first selection gate electrode (112b) on the gate insulation layer at a distance from the scanning transistor gate electrode; (c) a first doped region (108, 118) which is formed in the substrate below the tunnel insulation layer and which extends below the selection transistor gate electrode; (d) a second doped region (120a, 120b) formed in the substrate below the scanning transistor gate electrode and spaced from the first doped region; and (e) a third doped region (122a, 122b) formed in the substrate below the selection transistor gate electrode and spaced from the first doped region. The selection transistor gate electrode (II) also comprises a second selection gate electrode (116b) which is provided above a second interlevel insulation layer (114b) on the first selection gate electrode (112b) and which is spaced from the scanning gate electrode. An Independent claim is also included for a process for producing the above EEPROM.