首页> 外国专利> System for implementing hardware automated control of burst mode data transfer over a communication link between devices operating in a block mode

System for implementing hardware automated control of burst mode data transfer over a communication link between devices operating in a block mode

机译:用于以块模式操作的设备之间的通信链路实现突发模式数据传输的硬件自动控制的系统

摘要

Burst-mode data transfers between a SCSI host bus adapter and at least one SCSI bus device interface adapter are implemented by hardware. For a first embodiment of the invention, the device interface adapter is equipped with a first, second and third data registers, a comparator, a subtractor, and control logic in the form of an application specific integrated circuit. When a burst-mode transfer is requested, the first register is programmed with a value corresponding to the length of the transfer in bytes, and the second register is programmed with the maximum possible number of bytes in a burst. The comparator then compares the value in stored in the first register with the value stored in the second register and determines which is the smaller. The smaller of the two values is written to the third register. The subtractor then subtracts said third value from said first value to obtain a remainder value. The first value is then replaced with a new first value equal to said remainder value. The control logic orchestrates the steps of comparing said first and second values, storing the smaller of said first and second values in said third register, subtracting said third value from said first value to give a remainder value, replacing said first value with a new first value equal to said remainder value, and causing the steps of comparing, storing, subtracting and replacing to be repeated until said third value is equal to zero. Initial loading of the first and second registers is performed by either the control logic or by a microprocessor. For an alternate embodiment of the invention, the control logic, the comparator and the subtractor are replaced by a microprocessor.
机译:SCSI主机总线适配器和至少一个SCSI总线设备接口适配器之间的突发模式数据传输由硬件实现。对于本发明的第一实施例,设备接口适配器配备有专用集成电路形式的第一,第二和第三数据寄存器,比较器,减法器和控制逻辑。当请求突发模式传输时,第一个寄存器被编程为与传输长度相对应的字节数,而第二个寄存器被编程为具有最大可能字节数。然后,比较器将存储在第一寄存器中的值与存储在第二寄存器中的值进行比较,并确定哪个较小。两个值中较小的一个被写入第三个寄存器。然后减法器从所述第一值中减去所述第三值以获得余数。然后将第一值替换为等于所述余数的新的第一值。控制逻辑安排以下步骤:比较所述第一和第二值,将所述第一和第二值中较小的一个存储在所述第三寄存器中,从所述第一值中减去所述第三值以给出余数,然后用新的第一替换第一值。等于所述余数值的值,并重复比较,存储,减去和替换的步骤,直到所述第三值等于零为止。第一和第二寄存器的初始加载由控制逻辑或微处理器执行。对于本发明的另一实施例,控制逻辑,比较器和减法器由微处理器代替。

著录项

  • 公开/公告号US6108723A

    专利类型

  • 公开/公告日2000-08-22

    原文格式PDF

  • 申请/专利权人 HEWLETT-PACKARD COMPANY;

    申请/专利号US19980119164

  • 发明设计人 R. ALEXIS TAKASUGI;MARK J. SIMMS;

    申请日1998-07-20

  • 分类号G06F13/00;

  • 国家 US

  • 入库时间 2022-08-22 01:36:21

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