Procedure for the wafer scale integration of gallium arsenide based optoelectronic devices with silicon based integrated circuits

摘要

An integrated fabrication procedure of optoelectronic (OE) system, comprising light-emitting diodes (Lasers or LEDs) as well as photodetectors fabricated with III-V compound semiconductor epitaxial layers deposited on a crystalline wafer bonded on a Silicon wafer on which the CMOS/BiCMOS integrated circuits have been fabricated, characterized in that the bonding of the wafer containing the III-V epitaxial layers with the Silicon wafer is achieved either with an adhesive epoxy or with a Wafer Bonding procedure through the employment of an intermediate layer of SOG, SiO2 or Si3N4 (or a combination of them); the intermediate layers are deposited at low temperature (below 450°C) and the bonding is accomplished at even lower temperature (below 250°C). The invention is characterized in that the integration of the microelectronic with the optoelectronic components is achieved in a three-dimensional arrangement using a wafer scale fabrication procedure.