首页> 外国专利> / HDP CAPPING LAYER OR POLISH LAYRE OVER HSQ/PETEOS ILD STACK TO ENHANCE PLANARITY AND GAP-FILL

/ HDP CAPPING LAYER OR POLISH LAYRE OVER HSQ/PETEOS ILD STACK TO ENHANCE PLANARITY AND GAP-FILL

机译:/ HSQ / PETEOS ILD堆栈上的HDP覆盖层或抛光层,以增强平面性和间隙填充

摘要

PURPOSE: A HDP Capping layer or polish layer over HSQ/PETEOS ILD(inter level dielectrics) stack to enhance planarity and gap-fill is provided to form a dielectric stack with chemical and mechanical polishing process, without forming gaps, joints and divots. CONSTITUTION: The method forms an ILD, using high density plasma cap layers(HDP). A liner layer and an HSQ layer are deposited in a metal wire on a semiconductor body, followed by deposition of PETEOS layers on the HSQ layer. Gaps, joints or divots may be formed in the HSQ layer. Then HDP cap layers are deposited by means of high deposition ration to etching. The HDP processing forces to open any gaps to have them filed by the HDP materials. A structure formed through the method is subjected to chemical and mechanical polishing process after/before the HDP processing.
机译:目的:在HSQ / PETEOS ILD(层间电介质)叠层上增加HDP封盖层或抛光层,以提高平面度和间隙填充,从而形成具有化学和机械抛光工艺的电介质叠层,而不会形成间隙,接缝和凹痕。组成:该方法使用高密度等离子体覆盖层(HDP)形成ILD。在半导体主体上的金属线上沉积衬层和HSQ层,然后在HSQ层上沉积PETEOS层。间隙,接头或草皮可形成在HSQ层中。然后,通过高沉积率沉积HDP盖层以进行蚀刻。 HDP处理程序会强制打开任何间隙,以使它们由HDP材料归档。通过该方法形成的结构在HDP加工之后/之前要经过化学和机械抛光工艺。

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