首页> 外国专利> A SEMICONDUCTOR MEMORY DEVICE WITH FAST INPUT/OUTPUT LINE PRECHARGE SCHEME AND A METHOD OF PRECHARGING INPUT/OUTPUT LINES THEREOF

A SEMICONDUCTOR MEMORY DEVICE WITH FAST INPUT/OUTPUT LINE PRECHARGE SCHEME AND A METHOD OF PRECHARGING INPUT/OUTPUT LINES THEREOF

机译:具有快速输入/输出线预充电方案的半导体存储器及其对输入/输出线进行预充电的方法

摘要

This semiconductor memory device of the present invention disclosed in the interrupt detector includes writing the precharge signal generator, and a precharge circuit. The write interrupt detector is information for notifying the during normal mode write interrupt and occurs whether to detect a write interrupt detection signal fingers doeeotneun applied from outside, the precharge signal generator in response to said write interrupt detection signal when the normal mode, the and generating first and second pre-charge signal. Finally, the precharge circuit of the read / write prior to the normal mode when the write interrupt the first and second response to the precharge signal are arranged in an array on both sides of the memory cell, the first and second output line pairs free accounts. According to this structure, when the normal mode can be reduced, the write time and the address access time of the semiconductor memory device, and as a result it is easy to implement a high-speed semiconductor memory device.
机译:在中断检测器中公开的本发明的该半导体存储装置包括写入预充电信号发生器和预充电电路。写中断检测器是用于通知正常模式期间的写中断的信息,并且在正常模式下是否响应于从外部施加的写中断检测信号手指doeeotneun,预充电信号生成器来响应于所述写中断检测信号而发生。第一和第二预充电信号。最终,当写中断第一和第二对预充电信号的响应时,在正常模式之前的读/写的预充电电路被排列在存储单元的两侧,第一和第二输出线对空闲。 。根据这种结构,当可以减小正常模式时,半导体存储器件的写时间和地址访问时间,结果,容易实现高速半导体存储器件。

著录项

  • 公开/公告号KR100290286B1

    专利类型

  • 公开/公告日2001-05-15

    原文格式PDF

  • 申请/专利权人 NULL NULL;

    申请/专利号KR19990003937

  • 发明设计人 김병철;

    申请日1999-02-05

  • 分类号G11C11/407;

  • 国家 KR

  • 入库时间 2022-08-22 01:12:19

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