Semiconductor memory device capable of preventing speed loss due to large load of isolation control line

摘要

A semiconductor memory device, to prevent the loss of speed due to large load on the separate control line in order to realize high-speed operation is disclosed. The semiconductor memory device, a plurality of memory cell array in the column direction are arranged in a plurality of sense amplifier blocks to, and word lines in the top and bottom of each of the sense amplifier block direction is disposed on the right and left sides of each of the memory cell array and a plurality of connection regions. In particular, each of the connection regions characterized in that the discharge means connected between said separation control line and the ground provided to speed the discharge time of electric discharge of the separate control lines.