首页> 外国专利> Method for selective growth of Cu3Ge or Cu5Si for passivation of damascene copper structures and device manufactured thereby

Method for selective growth of Cu3Ge or Cu5Si for passivation of damascene copper structures and device manufactured thereby

机译:选择性生长用于钝化镶嵌铜结构的Cu3Ge或Cu5Si的方法及其制造的装置

摘要

Form a dielectric layer on a surface of a conductive substrate with a trench through the top surface down to the substrate. Form a barrier layer over the dielectric layer including the exposed surface of the conductive substrate and the exposed sidewalls of the dielectric layer. Form a copper conductor over the barrier layer and overfilling the narrow hole in the trench. Etch away material from the surface of the copper conductor by a CMP process lowering the copper leaving a thin layer of copper over the barrier layer above the dielectric layer aside from the hole. Form a copper passivation by combining an element selected from silicon and germanium with copper on the exposed surfaces of the copper surfaces forming an interface in the narrower hole between the copper and the copper compound located below the dielectric top level. Etch away material from the surface of the copper compound and the barrier layer to planarize the copper compound by etching down to the dielectric top level leaving a thin layer of the copper passivation compound covering the copper conductor in the narrower hole.
机译:在导电基板的表面上形成介电层,并在该基板上形成从上表面一直向下到基板的沟槽。在包括导电基底的暴露表面和介电层的暴露侧壁的介电层上形成阻挡层。在势垒层上方形成铜导体,并在沟槽中的窄孔中填满。通过CMP工艺从铜导体的表面上蚀刻掉材料,降低铜的含量,并在孔上方的电介质层上方的势垒层上方留下一层薄铜层。通过将选自硅和锗的元素与铜结合,在铜表面的裸露表面上形成铜钝化,从而在铜和位于介电顶层以下的铜化合物之间的较窄孔中形成界面。从铜化合物和阻挡层的表面上蚀刻掉材料,以通过向下蚀刻至电介质顶层来使铜化合物平坦化,从而在较窄的孔中留下一层薄薄的铜钝化化合物覆盖铜导体。

著录项

  • 公开/公告号US06181013B2

    专利类型

  • 公开/公告日2001-01-30

    原文格式PDF

  • 申请/专利权人

    申请/专利号US09524521

  • 申请日2000-03-13

  • 分类号H01L234/80;H01L235/20;H01L294/00;

  • 国家 US

  • 入库时间 2022-08-22 01:07:31

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