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FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signals

机译:具有嵌入式SRAM存储器模块和用于广播地址和控制信号的互连通道的FPGA集成电路

摘要

A field-programmable gate array device (FPGA) having plural rows and columns of logic function units (VGB's) further includes a plurality of embedded memory blocks, where each memory block is embedded in a corresponding row of logic function units. Each embedded memory block has an address port for capturing received address signals and a controls port for capturing supplied control signals. Interconnect resources are provided including a Memory Controls-conveying Interconnect Channel (MCIC) for conveying shared address and control signals to plural ones of the memory blocks on a broadcast or narrowcast basis.
机译:具有多个行和列的逻辑功能单元(VGB)的现场可编程门阵列设备(FPGA)还包括多个嵌入式存储块,其中每个存储块被嵌入在逻辑功能单元的相应行中。每个嵌入式存储器块具有用于捕获接收到的地址信号的地址端口和用于捕获所提供的控制信号的控制端口。提供了互连资源,包括用于传送共享地址和控制信号到广播或窄播基础上的多个存储块的存储器控​​制传送互连通道(MCIC)。

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