首页> 外国专利> Electronic circuit for generating a stable voltage signal for polarizing during a reading step UPROM memory cells operating at low feed voltage

Electronic circuit for generating a stable voltage signal for polarizing during a reading step UPROM memory cells operating at low feed voltage

机译:电子电路,用于产生稳定的电压信号以在读取步骤期间极化,以低馈电电压运行的UPROM存储单元

摘要

An electronic circuit generates a stable voltage signal for the polarization during a reading step of a UPROM redundancy cell incorporating at least one memory element of EPROM or Flash type, having at least one terminal to be polarized, and MOS transistors which connect such memory element to a low voltage power supply reference. The circuit includes a current mirror structure with a first control branch and a second output branch. The current mirror stricture includes a first series of MOS transistors (M2, M3, M4) in said first branch between the supply reference and a ground; and a second series of transistors (M5, M6, M7) in said second branch. The circuit also includes an input terminal connected to the gate terminal of a transistor of the first series of transistors and an output terminal corresponding to an interconnection node of the second series of transistors. The stable voltage is obtained through a current which passes through at least a pair of transistors of the second series.
机译:电子电路在UPROM冗余单元的读取步骤期间产生用于极化的稳定电压信号,该UPROM冗余单元包括至少一个EPROM或闪存类型的存储元件,该存储元件具有至少一个要极化的端子,以及将这种存储元件连接至的MOS晶体管。低压电源参考。该电路包括具有第一控制分支和第二输出分支的电流镜结构。电流镜结构包括在电源参考之间的所述第一分支中的第一系列的MOS晶体管(M 2 ,M 3 ,M 4 )。和地面;所述第二分支中的第二系列晶体管(M 5 ,M 6 ,M 7 )。该电路还包括连接到第一系列晶体管的晶体管的栅极端子的输入端子和对应于第二系列晶体管的互连节点的输出端子。通过流过第二串联的至少一对晶体管的电流来获得稳定电压。

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