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TRANSISTOR TYPE FERROELECTRIC NON-VOLATILE STORAGE ELEMENT AND ITS MANUFACTURING METHOD

机译:晶体管型铁电非易失性存储元件及其制造方法

摘要

PROBLEM TO BE SOLVED: To improve integration, and at the same time, to improve reliability in a ferroelectric transistor having MFMIS (conductor films-ferroelectric films- conductor films-insulating films-semiconductors) structure. SOLUTION: In a gate insulator capacitor made of MIS structure, a low permittivity layer inhibition layer 2 is interposed between the insulating film 3 made of a material having high permittivity of CeO2 and a semiconductor substrate 1 to inhibit the generation of a low-permittivity layer such as an SiO2 at the interface between the insulating film 3 and semiconductor substrate 1, and to inhibit reduction in capacity. The area of the gate insulator capacitor can be reduced to improve integration.
机译:要解决的问题:在具有MFMIS(导体膜-铁电膜-导体膜-绝缘膜-半导体)结构的铁电晶体管中,改善集成度并同时提高可靠性。解决方案:在由MIS结构制成的栅极绝缘体电容器中,低介电常数层抑制层2插在由具有高CeO2介电常数的材料制成的绝缘膜3和半导体衬底1之间,以抑制低介电常数层的产生在绝缘膜3与半导体衬底1之间的界面处的诸如SiO 2之类的SiO 2,并抑制电容的降低。可以减小栅极绝缘体电容器的面积以提高集成度。

著录项

  • 公开/公告号JP2002313966A

    专利类型

  • 公开/公告日2002-10-25

    原文格式PDF

  • 申请/专利权人 TARUI YASUO;NIPPON PRECISION CIRCUITS INC;

    申请/专利号JP20010116439

  • 发明设计人 TARUI YASUO;SAKAMAKI KAZUO;

    申请日2001-04-16

  • 分类号H01L21/8247;H01L27/105;H01L27/115;H01L29/788;H01L29/792;

  • 国家 JP

  • 入库时间 2022-08-22 00:56:49

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