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DELAY CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH THE DELAY CIRCUIT, AND DESIGN/DEVELOPMENT METHOD FOR THE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

机译:延迟电路,具有该延迟电路的半导体集成电路装置以及该半导体集成电路装置的设计/开发方法

摘要

PROBLEM TO BE SOLVED: To provide a delay circuit that can reduce a design period required for a timing adjustment while suppressing increase in the difficulty of the design itself.;SOLUTION: The delay circuit is provided with a delay section 2 that controls the delay time and includes delay elements 4 connected in series, a data input terminal 5 receiving data S, switches 6-1 to 6-6 connected in parallel between each input of the delay elements 4 and the data input terminal 5 and with a control section 3 that controls the delay time of the delay section 2 by controlling the switches 6-1 to 6-6 and includes flip-flop circuits F/F1-F/F5 that receive external serial control data DATA and are connected in series.;COPYRIGHT: (C)2002,JPO
机译:解决的问题:提供一种延迟电路,该延迟电路可以减少时序调整所需的设计周期,同时抑制设计本身的难度增加。解决方案:该延迟电路具有控制延迟时间的延迟部分2。并包括串联连接的延迟元件4,接收数据S的数据输入端子5,在延迟元件4的每个输入与数据输入端子5之间并联连接的开关6​​-1至6-6,以及控制部分3通过控制开关6-1至6-6来控制延迟部分2的延迟时间,并且包括接收外部串行控制数据DATA并串联连接的触发器电路F / F1-F / F5。 C)2002,日本特许厅

著录项

  • 公开/公告号JP2002043903A

    专利类型

  • 公开/公告日2002-02-08

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20000224260

  • 发明设计人 ITO YUKIKO;SETA KATSUHIRO;

    申请日2000-07-25

  • 分类号H03K5/13;G01R31/28;H01L21/82;H01L27/04;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-22 00:54:16

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