Method for manufacturing an MDL semiconductor device including a DRAM device having self-aligned contact hole and a logic device having dual gate structure

摘要

A method for manufacturing an MDL semiconductor device comprises forming a gate insulating layer and a gate conductive layer in a DRAM device region and a logic device region to provide gate conductive layer patterns which will be respectively formed in the DRAM device region and the logic device region. Next, the gate conductive layer of the logic device region is patterned, and a gate conductive layer pattern is formed only in the logic device region. Spacers are formed on the gate conductive layer patterns, and impurity ions of different conductivity types are twice injected by a process for forming a mask layer pattern and an ion injection process. The first ion injection is performed on one gate conductive layer pattern of the logic device region, and the second ion injection is performed on the gate conductive layer of the DRAM device region and the other gate conductive layer pattern of the logic device region. Next, a patterning process is performed on the DRAM device region for forming gate conductive layer stacks, and self-aligned contact pads are formed.