Voltage margin testing using an embedded programmable voltage source

摘要

An apparatus and method for performing voltage margin testing in an integrated circuit device. The device is provided with an embedded voltage source having a voltage regulator which outputs a regulated analog voltage at a nominal magnitude, such as +3.3 volts. A voltage monitor provides an indication when the regulated analog voltage varies from the nominal magnitude by an output tolerance range determined as a first selected percentage of the nominal magnitude. An adjustment circuit applies a voltage regulator adjustment signal to the voltage regulator to adjust the regulated analog voltage by a second selected percentage of the nominal magnitude. The adjustment circuit further provides a voltage monitor adjustment signal to the voltage monitor to concurrently adjust the output tolerance range to a third selected percentage of the nominal magnitude different from the first selected percentage.