首页> 外国专利> Semiconductor integrated circuit device having switching misfet and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring

Semiconductor integrated circuit device having switching misfet and capacitor element and method of producing the same, including wiring therefor and method of producing such wiring

机译:具有开关杂散和电容器元件的半导体集成电路器件及其制造方法,包括其布线及其制造方法

摘要

A semiconductor integrated circuit device having a switching MISFET, and a capacitor element formed over the semiconductor substrate, such as a DRAM, is disclosed. In a first aspect of the present invention, the impurity concentration of the semiconductor region of the switching MISFET to which the capacitor element is connected is less than the impurity concentration of semiconductor regions of MISFETs of peripheral circuitry. In a second aspect, the Y-select signal line overlaps the lower electrode layer of the capacitor element. In a third aspect, a potential barrier layer, provided at least under the semiconductor region of the switching MISFET to which the capacitor element is connected,, is formed by diffusion of an impurity for a channel stopper region. In a fourth aspect, the dielectric film of the capacitor element is co-extensive with the capacitor electrode layer over it. In a fifth aspect, the capacitor dielectric film is a silicon nitride film having a silicon oxide layer thereon, the silicon oxide layer being formed by oxidizing a surface layer of the silicon nitride under high pressure. In sixth and seventh aspects, wiring is provided. In the sixth aspect, an aluminum wiring layer and a protective (and/or barrier) layer are formed by sputtering in the same vacuum sputtering chamber without breaking the vacuum between forming the layers; in the seventh aspect, a refractory metal, or a refractory metal silicide QSix, where Q is a refractory metal and 0x2, is used as a protective layer, for an aluminum wiring containing an added element (e.g., Cu) to prevent migration.
机译:公开了一种半导体集成电路器件,其具有开关MISFET和形成在半导体衬底上方的电容器元件,例如DRAM。在本发明的第一方面中,与电容器元件连接的开关MISFET的半导体区域的杂质浓度小于外围电路的MISFET的半导体区域的杂质浓度。在第二方面,Y选择信号线与电容器元件的下电极层重叠。在第三方面中,通过用于沟道停止区的杂质的扩散来形成至少设置在与电容器元件连接的开关MISFET的半导体区域下方的势垒层。在第四方面中,电容器元件的介电膜与其上的电容器电极层共同延伸。在第五方面中,电容器电介质膜是其上具有氧化硅层的氮化硅膜,该氧化硅层通过在高压下氧化该氮化硅的表面层而形成。在第六和第七方面,提供了布线。在第六方面中,在同一真空溅射室中通过溅射形成铝布线层和保护(和/或阻挡)层,而不会破坏形成各层之间的真空。在第七方面中,用于包含铝的铝布线的难熔金属或难熔金属硅化物QSi x ,其中Q是难熔金属且0

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