首页> 外国专利> N bit by M bit multiplication of twos complement numbers using N/2amp;plus;1 X M/2amp;plus;1 bit multipliers

N bit by M bit multiplication of twos complement numbers using N/2amp;plus;1 X M/2amp;plus;1 bit multipliers

机译:使用N / 2 ++ 1 X M / 2 ++ 1位乘法器对N乘M的二进制补码进行N位乘M位乘法

摘要

The operands of an N×M bit multiplication are partitioned into N/j+1 and M/k+1 bit signed submultiples. The most significant submultiple is assigned the sign of the operand, while each of the less significant submultiples is assigned a positive sign. The product of each submultiple pair is sign extended to the width of the product (N+M), and the accumulation of these sign extended submultiple products provides the product of the original twos complement operands, in twos complement form.
机译:N×M位乘法的操作数被划分为N / j + 1和M / k + 1位有符号的子整数。最高有效的约数被分配了操作数的符号,而每个较低有效的约数被分配了一个正号。每个约数对的乘积被符号扩展到乘积的宽度(N&M),并且这些符号扩展的约数乘积的累加提供了二进制补码形式的原始二进制补码操作数的乘积。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号