Row redundancy circuit using a fuse box independent of banks

摘要

A row redundancy circuit for use in a semiconductor memory device of the present invention having a fuse box independent of banks so as to improve repair efficiency. The row redundancy circuit includes a fuse box coupled to a row address and a bank address from an address buffer in which a fuse corresponding to an address of a word line to be repaired blows-out, a row fuse decoder for AND-operating two outputs of the fuse box, and a bank row address latch coupled to the output of the row fuse decoder for determining a location of a redundant word line in a block to be repaired.