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MOS circuit for reducing the voltage of diodes

机译:降低二极管电压的MOS电路

摘要

A circuit for lowering the effective voltage drop of a semi-conductor diode. The circuit includes a first Metal Oxide Semi-conductor (MOS) device connected in parallel with the diode. A bias voltage which is close to but lower than the threshold voltage is applied to the MOS device. When a forward voltage is applied to the diode, this voltage is added to the source to drain voltage of the MOS device which turns it on. The MOS device then bypasses the diode to effectively overcome the inherent forward voltage drop of the diode. The circuit is advantageously applied to a rectifier circuit to reduce input voltage requirements and improve the efficiency of the rectifier.
机译:一种用于降低半导体二极管的有效压降的电路。该电路包括与二极管并联连接的第一金属氧化物半导体(MOS)器件。将接近但低于阈值电压的偏置电压施加到MOS器件。当向二极管施加正向电压时,此电压会加到源极,以使MOS器件的漏极电压导通。 MOS器件然后绕过二极管以有效克服二极管固有的正向压降。该电路有利地应用于整流器电路,以降低输入电压要求并提高整流器的效率。

著录项

  • 公开/公告号SE0200378D0

    专利类型

  • 公开/公告日2002-02-11

    原文格式PDF

  • 申请/专利权人 ZARLINK SEMICONDUCTOR AB;

    申请/专利号SE20020000378

  • 发明设计人 TONY *OHLSSON;

    申请日2002-02-11

  • 分类号H02M;

  • 国家 SE

  • 入库时间 2022-08-22 00:42:59

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