An integrated circuit includes a pulse generator for generating a pulse of a predetermined duration. A first switch, controlled by the pulse, drives current into a fuse link when the pulse takes on a first logic level. The first switch prevents flow of current into the fuse link when the pulse takes on a second logic level. A latch is coupled to the fuse link to sense a logic level developed during the pulse. The latch may be cleared by the leading edge of the pulse. The logic level developed at the fuse link due to the driven current is latched into the latch by the trailing edge of the pulse and is indicative of whether the fuse link was blown or not blown.
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