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COMPUTER SYSTEM ABSENT A PARALLEL SYSTEM BUS

机译:缺少并行系统总线的计算机系统

摘要

PURPOSE: A computer system without a parallel systematic bus is provided to offer a unique computer architecture. CONSTITUTION: The computer system comprising a CPU and at least some additional components of a conventional computer, each of the components in electrical contact with a serial Bus controller which possesses means to serve as an arbitrator between the components and also any peripheral devices and the CPU having means to communicate with the serial Bus controller, the system absent any parallel computer BUS. A processor chip(9) and a main memory(14) communicate through the serial Bus controller(SBC, 15). The communication occurs at a speed whose upper limit is dictated by the limit of serial data transmission. Currently, the is 800 Mbps for IEEE 1394 or 2.12 and 4.25 Gbps for Fibre Channel.
机译:目的:提供一种不具有并行系统总线的计算机系统,以提供独特的计算机体系结构。组成:计算机系统,包括一个CPU和至少一些常规计算机的其他组件,每个组件与串行总线控制器电接触,该串行总线控制器具有充当组件与任何外围设备和CPU之间的仲裁器的手段由于具有与串行总线控制器通信的装置,因此系统没有任何并行计算机BUS。处理器芯片(9)和主存储器(14)通过串行总线控制器(SBC,15)通信。通信以其上限取决于串行数据传输限制的速度进行。当前,对于IEEE 1394或2.12,该速率为800 Mbps;对于光纤通道,该速率为4.25 Gbps。

著录项

  • 公开/公告号KR20020014664A

    专利类型

  • 公开/公告日2002-02-25

    原文格式PDF

  • 申请/专利权人 XYBERNAUT CORPORATION;

    申请/专利号KR20010030162

  • 发明设计人 SALLAM HUSSEIN;

    申请日2001-05-30

  • 分类号G06F13/20;

  • 国家 KR

  • 入库时间 2022-08-22 00:31:29

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