NEW METHOD OF FORMING SELECT GATE TO IMPROVE RELIABILITY AND PERFORMANCE FOR NAND TYPE FLASH MEMORY DEVICES

摘要

The present invention is a method for fabricating a flash memory cell 66 comprising NAND type flash memory consisting of select transistors 68 and high voltage transistors 700 and low voltage transistors 72. The method comprises the following steps Forming a tunnel oxide layer 36; depositing a first amorphous silicon layer 38; depositing an ONO 40 as a multilayer dielectric; depositing a tunnel oxide layer, silicon and ONO (70) and low-voltage (72) regions; growing a second oxide layer (48); and selectively removing the second oxide layer from the selected and low voltage regions , Growing a third oxide layer (56), (58), growing a second amorphous silicon layer (60), and patterning the deposited layers to form the transistors.