首页> 外国专利> INSTRUCTION PROCESSING METHOD FOR VERIFYING BASIC INSTRUCTION ARRANGEMENT IN VLIW INSTRUCTION FOR VARIABLE LENGTH VLIW PROCESSOR

INSTRUCTION PROCESSING METHOD FOR VERIFYING BASIC INSTRUCTION ARRANGEMENT IN VLIW INSTRUCTION FOR VARIABLE LENGTH VLIW PROCESSOR

机译:验证可变长度VLIW处理器的VLIW指令中基本指令排列的指令处理方法

摘要

PURPOSE: To provide an instruction processing method that is suitable to the language processing system of a processor in which an instruction issue width is different on the basis of a variable-length very long instruction word architecture. CONSTITUTION: A first step for specifying the category of a function unit that can perform a basic instruction constituting an instruction carried out by a processor, a second step for deciding whether to be able to arrange the basic instruction at a logical instruction slot, and a third step for considering the relation between the basic instruction decided to be arrangeable and other basic instructions arranged at the logic instruction slot and arranging the basic instruction decided to be arrangeable at an instruction slot of the processor are included.
机译:目的:提供一种指令处理方法,该方法适用于基于可变长度非常长的指令字体系结构,其中指令发布宽度不同的处理器的语言处理系统。组成:第一步,确定可以执行构成处理器指令的基本指令的功能单元的类别;第二步,确定是否能够将基本指令安排在逻辑指令槽中;以及包括第三步骤,用于考虑被确定为可布置的基本指令与布置在逻辑指令槽处的其他基本指令之间的关系以及布置被确定为可布置在处理器的指令槽处的基本指令之间的关系。

著录项

  • 公开/公告号KR20020083118A

    专利类型

  • 公开/公告日2002-11-01

    原文格式PDF

  • 申请/专利权人 FUJITSU LIMITED;

    申请/专利号KR20020008731

  • 发明设计人 KAMIGATA TERUHIKO;MIYAKE HIDEO;

    申请日2002-02-19

  • 分类号G06F9/38;

  • 国家 KR

  • 入库时间 2022-08-22 00:30:11

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