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Packet switch system structure for reducing to reduce a blocking problem of broadcast packets

机译:用于减少以减少广播分组的阻塞问题的分组交换系统结构

摘要

The present invention relates to a structure of a packet switch system for solving the problem of blocking that occurs when point-to-multipoint switching operation as broadcast packets.; Packet switch system of the present invention is a unicast packet and a broadcast / multi-separation of the switching path of the multicast packet to unicast packets, and switching through the switch fabric, according to their destination, broadcast packets are broadcast packets from the switch fabric, It is switched to separate paths in order of the assigned switching. Broad separate switching path for the multicast packet is processed to store the packets which are being connected to any output port module, the output port module to remove the buffer for unicast and broadcast buffer for a bus type. Packets that are stored separately in the output port module are controlled by the management packet forwarding unit for transmission of data. And input and output port module forwarding negative signal bus is configured to separate in accordance with the signals to be processed. Thus, the packet switch system architectures of the present invention can reduce the blocking of the switch during the switching operation for the broadcast / multicast packet, since the broadcast packet and the unicast packet is processed at a slot time can be improved switch performance. In addition, input and output port module forwarding portion bus structure consisting of separated allows to obtain a wire-speed switching performance in a low internal capacitance signal.
机译:本发明涉及一种分组交换系统的结构,用于解决当点对多点交换操作作为广播分组时发生的阻塞问题。本发明的分组交换系统是单播分组和将广播/广播路径的多路广播/多路分离成单播分组,并通过交换结构进行交换,根据其目的地,广播分组是来自交换机的广播分组。结构,按分配的切换顺序切换到单独的路径。处理多播数据包的广泛的单独交换路径,以存储连接到任何输出端口模块的数据包,该输出端口模块用于删除单播缓冲区和总线类型的广播缓冲区。分别存储在输出端口模块中的数据包由管理数据包转发单元控制,以进行数据传输。并且输入和输出端口模块转发负信号总线被配置为根据要处理的信号进行分离。因此,本发明的分组交换系统架构可以减少广播/多播分组的交换操作期间的交换阻塞,因为可以改善时隙性能处理广播分组和单播分组的交换性能。另外,由分离的输入和输出端口模块转发部分总线结构允许在低内部电容信号下获得线速开关性能。

著录项

  • 公开/公告号KR100356015B1

    专利类型

  • 公开/公告日2002-10-18

    原文格式PDF

  • 申请/专利权人 한국전자통신연구원;

    申请/专利号KR19990053517

  • 发明设计人 이형섭;도한철;이형호;

    申请日1999-11-29

  • 分类号H04L12/56;

  • 国家 KR

  • 入库时间 2022-08-22 00:29:20

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