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Method of evaluating semiconductor integrated circuit to be designed in consideration of standby DC leakage current
Method of evaluating semiconductor integrated circuit to be designed in consideration of standby DC leakage current
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机译:考虑待机直流泄漏电流的待设计半导体集成电路的评估方法
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摘要
First, circuit simulation programs are executed based on electric information of a schematic of a semiconductor integrated circuit. Then, LVS (layout versus schematic) programs are executed using the electric information of the schematic and physical layout information corresponding to the schematic. The semiconductor integrated circuit is therefore evaluated by processing circuit design value information obtained from the circuit simulation programs and layout information obtained by execution of the LVS programs.
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