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Write-inhibit circuit, semiconductor integrated circuit using the same, ink cartridge including the semiconductor integrated circuit, and ink-jet recording apparatus

机译:禁止写入电路,使用该禁止写入电路的半导体集成电路,包括该半导体集成电路的墨盒以及喷墨记录装置

摘要

Chip area and operating current is reduced in a chip having a write-inhibit circuit that uses a data-writing request signal WR and a write-control signal WRITE to inhibit data writing. By comparing a reference current Iref and a drive current ID, a current-mirror circuit CM can monitor the voltage of a power supply VDD. When the voltage of the power supply VDD is sufficiently high, the data-writing request signal WR is unchanged. Conversely, when the voltage of the power supply VDD is not sufficiently high, a transistor T6 producing reference-current ID and a buffer B2 cause the write-control signal to be low L irrespective of whether the data-writing request signal WR is at H or at L. Thus, miswriting can be prevented when the power-supply voltage decreases, since writing by the data-writing request signal WR is impossible.
机译:在具有写禁止电路的芯片中减小了芯片面积和工作电流,该写禁止电路使用数据写请求信号WR和写控制信号WRITE来禁止数据写。通过比较基准电流Iref和驱动电流ID,电流镜电路CM可以监视电源VDD的电压。当电源VDD的电压足够高时,数据写入请求信号WR不变。相反,当电源VDD的电压不够高时,产生参考电流I D 的晶体管T6和缓冲器B2使写控制信号为低L,而与数据是否相关无关。写入请求信号WR为H或L。因此,由于无法通过数据写入请求信号WR进行写入,因此能够防止电源电压降低时的写入错误。

著录项

  • 公开/公告号US6594185B1

    专利类型

  • 公开/公告日2003-07-15

    原文格式PDF

  • 申请/专利权人 SEIKO EPSON CORPORATION;

    申请/专利号US20010857471

  • 发明设计人 TETSUO TAKAGI;

    申请日2001-07-26

  • 分类号G11C70/00;

  • 国家 US

  • 入库时间 2022-08-22 00:06:17

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