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System and method utilizing on-chip voltage controlled frequency modulation to manage power consumption

机译:利用片上电压控制频率调制来管理功耗的系统和方法

摘要

A system and method are disclosed which utilize an on-chip oscillator to provide the appropriate clock frequency for components of the chip to manage power consumption by the chip. More specifically, in a preferred embodiment of the present invention, an on-chip oscillator is utilized to provide the clock frequency for the chip's core circuitry, and such oscillator can dynamically adjust such clock frequency to manage the chip's power consumption. Thus, such on-chip oscillator generates the processor clock instead of the usual synchronous, externally controlled clock generator. A preferred embodiment of the present invention utilizes a voltage controlled frequency oscillator to control the chip's clock frequency in order to dynamically manage power consumption by the chip. Such oscillator is preferably operable to adjust its output frequency based on the voltage supplied to such oscillator to effectively manage the chip's power consumption.
机译:公开了一种系统和方法,其利用片上振荡器为芯片的组件提供适当的时钟频率以管理芯片的功耗。更具体地,在本发明的优选实施例中,利用片上振荡器为芯片的核心电路提供时钟频率,并且这种振荡器可以动态地调整这种时钟频率以管理芯片的功耗。因此,这种片上振荡器产生处理器时钟,而不是通常的同步,外部控制的时钟发生器。本发明的优选实施例利用压控频率振荡器来控制芯片的时钟频率,以便动态地管理芯片的功耗。这种振荡器优选地可操作以基于提供给该振荡器的电压来调节其输出频率,以有效地管理芯片的功耗。

著录项

  • 公开/公告号US6509788B2

    专利类型

  • 公开/公告日2003-01-21

    原文格式PDF

  • 申请/专利权人 HEWLETT-PACKARD COMPANY;

    申请/专利号US20010811255

  • 发明设计人 SAMUEL D. NAFFZIGER;DON D JOSEPHSON;

    申请日2001-03-16

  • 分类号H01J198/20;

  • 国家 US

  • 入库时间 2022-08-22 00:05:27

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