首页> 外国专利> Elimination of address-sensitivity by synchronous reference for sense amplifier

Elimination of address-sensitivity by synchronous reference for sense amplifier

机译:通过同步基准消除灵敏放大器的地址敏感度

摘要

A method and apparatus for stabilizing a sense amplifier utilized in a memory array of a semiconductor integrated circuit. A memory cell of the memory array may be selected, wherein the selected memory cell is associated with a sense amplifier. A cell current associated with the selected memory cell and a reference current associated with a reference memory cell can be generated. Thereafter, the reference current may be synchronized with a plurality of address inputs to eliminate a source line resistance associated with the selected memory cell, thereby resulting in a stabilization the sense amplifier by the elimination of associated address sensitivity.
机译:一种用于稳定在半导体集成电路的存储器阵列中使用的读出放大器的方法和装置。可以选择存储阵列的存储单元,其中,所选择的存储单元与读出放大器相关联。可以产生与所选存储单元相关的单元电流和与参考存储单元相关的参考电流。此后,参考电流可以与多个地址输入同步,以消除与所选存储单元相关的源极线电阻,从而通过消除相关的地址灵敏度来稳定读出放大器。

著录项

  • 公开/公告号US6639847B1

    专利类型

  • 公开/公告日2003-10-28

    原文格式PDF

  • 申请/专利权人 TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD;

    申请/专利号US20020180270

  • 发明设计人 KWAN-JEN CHU;

    申请日2002-06-26

  • 分类号G11C160/40;

  • 国家 US

  • 入库时间 2022-08-22 00:05:19

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